1. Field of the Invention
This invention relates to a method of manufacturing semiconductor devices having a multi-layered structure in which an upper layer connects to a lower layer through a contact hole, and more particularly to a method of forming a metalized pattern without breakage.
2. Description of the Related Art
A wiring structure of the semiconductor device is shown in FIG. 3.
In FIG. 3, a field oxide layer 2 for providing isolation between active areas is formed on a semiconductor substrate 1. A diffusion layer 3 is formed by doping phosphorus (P) into an active area of a surface of the substrate 1. Next an insulating layer (e.g., BPSG) 4 is formed on the semiconductor substrate 1 using a chemical vapor deposition (CVD) process. The insulating layer 4 then is etched selectively to form a contact hole 5 until a surface of the diffused region 3 in the semiconductor substrate 1 is exposed. An Al-Si series metal layer 6 is then formed over the entire area of the surface of the semiconductor substrate using a sputtering process. The metal layer 6 is etched selectively to form the desired wiring pattern or structure.
The wiring structure of the conventional device is completed by the steps mentioned above. As can be seen in FIG. 3, with this process the metal layer 6 does not completely fill the content hole 5 so that the outer surface of the portion of metal layer 6 actually contacting the region 3 forms a step with the outer surface of the remainder of the layer 6.
However, the diameter of the contact hole becomes smaller in proportion to increasing an integration of the devices. Therefore, the aspect ratio of the depth of the diameter of the contact hole 5 becomes larger.
In such a device, which is formed by the manufacturing process shown in FIG. 3, it is difficult to form the metalizing wiring pattern without breakage in the contact hole 5 because of the deterioration of the step-coverage of the metal layer.
In order to overcome such a problem, a technique has been developed, which fills the contact hole with metal material before the metal layer is formed over the semiconductor substrate.
A typical example of this teaching utilizes a selective tungsten (W)-CVD process and is explained with reference to FIG (4). In FIG. 4, a field oxide layer 12 for isolation between active areas and a diffusion layer 13 are formed on the surface of the semiconductor substrate 11. Then an insulating layer 14 with a contact hole 15 over the diffusion layer 12 is formed on the semiconductor substrate 11. Next only the contact hole 15 is completely filled with a tungsten layer 16 by the selective W-CVD process. Consequently, the W layer surface is at the same surface as the insulating layer 14 and does not form a step with the insulating layer 14. Then, an aluminum-silicon (Al-Si) series metal layer 17 is formed over the whole surface of the substrate 11 by using a sputtering process. The metal layer 17 subsequently is etched selectively to form a predetermined metalized pattern.
According to this method, the above problem can be solved.
However, in an actual device having the multi-layered structure shown in FIG. 5, it is required to form contact holes with different depths for the diffusion layer 23 and for the first electrode 25. In this case, if the selective CVD process is utilized for this device, W layers 28 and 29 are formed simultaneously in the contact hole 26 on the diffusion layer 23 and in the contact hole 27 on the first electrode 25 as a lower conductive layer by the W-CVD process. Therefore, the thickness (m) of the W layers 28 and 29 must be equal to or thinner than the thickness (1) of the insulating layer 24 on the first electrode 25. This is because if a W layer 28 in the contact hole 26 having a thickness which is equal to the thickness (n) of the insulating layer 24 on the substrate 21 is formed, the W layer 29 runs over the contact hole 27. As a result, it is possible that the W layer 29 shorts with another W layer formed in another contact hole (not shown in the drawings) which has the same depth as contact hole 26.
Therefore, the contact hole 26 is not completely filled by the W layer because the thickness of the W layer 28 is equal to that of the W layer 29 and the depth of the contact hole 26 is deeper than that of the contact hole 27. As the result, it is quite possible that the second electrode layer 30, i.e., the conductive layer, breaks in the contact hole 26 because of the deterioration of the step-coverage.
As the reason of the above mentioned, it is not satisfied technically that the selective W-CVD process is adapted to the manufacturing of the device which has contact holes with different depths.
Accordingly, an object of this invention is to provide a method of manufacturing semiconductor devices which can solve the above mentioned problem.